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Category Archives: Design
The hidden low-power virtues of IP Subsystems
I’ve been writing about Semico’s new IP report for the last couple of weeks over on my EDA360 blog called the EDA360 Insider. (See: “Are IP subsystems the next big IP category?”, “Semico report lists the six biggest issues challenging … Continue reading
Posted in Design, IP, Low-Power, SOC
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Low-Power Lowdown from LSI’s Ruggero Castagnetti
“Power is a concern, a headache.” That’s how Distinguished Engineer Ruggero Castagnetti chose to start his presentation on “What’s Cool in Low Power Design” at LSI Corp’s recent 2010 Conference and Technology Showcase. However, the issue isn’t really “low power” … Continue reading
Low-Power Design with FPGAs: The Basics
Spiraling complexity in all facets of electronic design often cause us to take our eyes off the basics. A recent paper presented at the IEEE International Conference on Intelligent Control and Information Processing (ICICIP 2010), held in Dalian, China in … Continue reading
Posted in Design, FPGA, Low-Power, SOC
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News from two fronts in the low-power processor wars: AMD’s Bobcat and a 28nm low-power test chip from ARM and Globalfoundries
It’s been a big couple of weeks for major news in the world of low-power microprocessors. AMD gave two significant processor presentations at the Hot Chips 22 conference held at Stanford University on August 24. One processor, Bulldozer, is a … Continue reading
Ethernet ports, low power, and multimedia, Part 2
In the previous post, I discussed the huge potential power savings being enabled by the IEEE’s 802.1-az Ethernet specification now under development and early deployment. While IEEE 802.1-az promises to save significant amounts of power and energy through the use … Continue reading
Ethernet ports, low power, and multimedia, Part 1
When you think about the massive affects that the Ethernet standards have had on system design, the overall impact is no less than staggering—and I do not use that term lightly. Thirty years ago, when Ethernet was new, networking was … Continue reading
Posted in Design, Green Design, Low-Power, Networking
Tagged Energy Efficient Ethernet, Ethernet
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Freescale’s earthquake: ColdFire+ and Kinetis families shake up the 32-bit microcontroller landscape
Yesterday, while walking the San Andreas fault in the Los Trancos Open Space Preserve in the Santa Cruz Mountains above Palo Alto, Paul Billig the Docent pointed out some nondescript rocks half buried along the hiking path. “These rocks don’t come from … Continue reading
Multicore server, PC, and embedded designs push memory power, drive use of advanced DDR3 SDRAMs
Systems designers try all sorts of methods to reduce system power consumption. For years, we’ve relied on circuit tricks and have been reducing logic supply levels from the 5V power supplies that were so common in from the 1970s and … Continue reading
SPMT engulfs LPDDR2 standard, making adoption a no-brainer. Meanwhile Marvell jumps on the bandwagon.
An insidious power problem has slowly crept up on embedded-system designers. While most of us were firmly focused on the power dissipation of our ever-expanding logic designs with their increasing number of processor cores in multicore designs, we mostly ignored … Continue reading
More on the Xilinx EPP: Three ways to communicate with on-chip peripherals
Last month I discussed the newly introduced Xilinx Extensible Processing Platform (EPP), which represents a new product line and a new venture for FPGA leader Xilinx. To briefly recap, devices in the EPP device family are essentially a high-end microcontroller … Continue reading
