Operating in the 5 GHz band, 802.11ac chips will

• have 2-4x the bandwidth of 802.11n (80 and 160 MHz channels vs. 40 MHz for 11n);
• achieve a data throughput of up to 1 GBbit/s—~10x better than 11g and about 3x better than 11n for 2- and 3-stream implementations;
• support multi-user MIMO with up to 8 data streams (vs. 4 in 11n);
• support up to 256-QAM vs. 64-QAM in 11n;
• theoretically result in a considerably better power profile than 11n.

The “theoretically” hinges on the fact that the 802.11ac specification is yet to be ratified. The Initial Technical Specification Draft 0.1 was confirmed by IEEE 802.11 TGac on January 20, 2011. The specification isn’t expected to be finalized until mid-year at the earliest, at which point the Wi-Fi Alliance expects to ratify it, though IEEE ratification will take longer.

Are We There Yet?

That hasn’t stopped a rush to market with ‘pre-ac’ silicon, exactly the same thing that happened before the 802.11n specification was ratified. Last time the first out of the chute was Broadcom, whose ‘pre-n’ 802.11 chips hit the market well before the warring camps in the IEEE working group had ironed out their differences.

At CES earlier this month Broadcom announced that it is sampling 802.11ac silicon—the BCM43xx family, which it refers to as ’5G WiFi’—though it is yet to announce a date for full production. Early adopters of Broadcom’s 11n chips took a big chance but came out unscathed. Will they be as lucky this time? According to Michael Hurlston, Broadcom’s senior vice president of Broadcom’s Home and Wireless Networking business unit, ”I’m confident that any changes to the spec beyond this point and before final ratification will be window dressing, and relatively small.” History, hype, or hope? Only time will tell. Still, having pulled it off before—and pushing a lot of chips, as it were, onto the table—it would be foolish to bet against Broadcom.

Also joining the ‘pre-ac’ race is Redpine Networks, currently sampling its Quali-Fi™ 802.11ac chip. The Quali-Fi product is accompanied by Redpine’s software framework that includes an access point, Wi-Fi certified client and Redpine’s Wi-Fi Direct™ functionality. Redpine CEO Venkat Matella tells Low-Power Design that modules with 801.11ac chipsets will be available late this year or early 2013.

I’d be very surprised if Qualcomm/Atheros and Samsung—who co-chair the IEEE 11ac Task Group—as well as committee members Cisco, Intel, LG, Marvell, Mediatek, and others—didn’t announce 11ac chips shortly after the specification is ratified—if not before.

With even once power-hungry Wi-Fi now joining the low-power race, low-power wireless is no longer just a trend, it’s mainstream. We may not be ‘there yet’—and never will be, since the goal is one you can only approach asymptotically—but silicon vendors are making an impressive amount of incremental progress. Stay tuned for more exciting developments.

The CY3267 PowerPSoC kit includes a main board built around a CY8CLED04D PowerPSoC MCU in a floating load buck topology. The PSoC core drives four 1A internal MOSFETs that power a 10W 4-channel RGBA LED mounted on a separate daughter card sitting atop a large heatsink. A power supply, USB cable, LED diffuser, an assortment of jumpers, and a MiniProg programming connector complete the kit.

Within five minutes of opening the package I was able to connect the daughter card to the main board; connect the main board to my computer; power up both boards; and cycle through the different colors in the LED array using the two Capsense buttons. Five minutes later I had installed the Intelligent Lighting Control application included on the kit CD and could experiment with basic lighting control.

Figure 1: Intelligent Lighting Control GUI

The Intelligent Lighting Control application (Figure 1) works with the default firmware to demonstrate 4-channel color mixing. From the CIE Color Selection tab you can click on any point on the color gamut and watch the LED array output that color. You can set the intensity by moving the Requested Luminous Flex slider. You can also set the white intensity by moving the Color Temperature Control slider (up to 4000K).

Clicking on the Direct LED Control tab you can move each of the four sliders to select the intensity of the red, green, blue, and amber LEDs. More…

SiliconBlue Technologies has announced that it is sampling its Los Angeles family of low-power FPGAs – the LP series for smart phones and the HX series for tablets. The FPGA fabric routing in the LP series is optimized for low power and in the HX series for speed. Both product lines are based on TSMC’s 40-nm LP CMOS process and achieve, according to SiliconBlue CEO Kapil Shankar, static power of “tens of microwatts for LP and hundreds of microwatts for HX.”

SiliconBlue’s unique contribution is an SRAM-based FPGA fabric that, according to Shankar, “can operate from a 1.0V core and consume 50% less static power and over 50% less dynamic power than 1.8V ‘low-power’ PLD alternatives.” The Los Angeles family tops out at 16,192 logic cells (800K system gates), a good order of magnitude higher than CPLDs, opening up a far wider range of possible applications.

How Did They Do That?

Going to 40 nm certainly helps to reduce dynamic power, since you can drop the core voltage to 1.0V. On the other hand quantum tunneling through very thin gate dielectrics increases leakage current and drains off the charge from SRAM capacitors. SiliconBlue has introduced some ‘secret sauce’ CMOS process improvements and altered the gate geometries to minimize off-state leakage. Their iCE65L04 chip—with 3,520 logic cells or 2,700 equivalent macrocells—draws 26 µA in standby mode.

There are some other interesting tweaks to the usual SRAM FPGA fabric. Instead of constructing LUTs from N-channel transistors, SiliconBlue uses matching N- and P-channel transistors, effectively limiting leakage. The chips use a buffer-free interconnect, dispensing with the usual 4-6 buffers per interconnect. Finally, the routing fabric is designed for minimum leakage, not maximum speed.

Shankar told Low-Power Design that the chips have no static or full shutdown mode, though only the portions of the chip that are actually used are powered up, the rest are shut down; static power is measured at 0 Hz, namely with the clock shut down.

SiliconBlue uses a 2T non-volatile SRAM memory—based on Kilopass’ XPM CMOS NVM process—that avoids the expense of embedded Flash or EEPROM. Traditional floating-gate memories such as EPROM, EEPROM, NOR and NAND Flash as well as SONOS store electrical charges near a transistor gate; at smaller geometries—helped by mobile ion contaminants—those charges can bleed off quickly. SiliconBlue’s Non-Volatile Configuration Memory (NVCM) “uses the controlled electrical change of transistor gate dielectric from insulator to conductor as the basis of the memory.” NVCM blocks are built on the same bulk CMOS die as the programmable fabric, reducing processing costs and die size while adding an ‘instant on’ capability to the chips. The company claims the NVCM blocks take up only 2-5% of the die area and draw 8 µA operating current.

Packaging also targets high-density PCBs. The smallest parts come in a 2.5 x 2.5 mm (0.4 mm pitch) micro plastic BGA package, made possible by using wafer-level chip-scale technology.

What’s a CMD?

You don’t grab handset sockets selling FPGAs. QuickLogic, for example, doesn’t make (OTP) FPGAs, they make Customer Specific Standard Products (CSSPs), a sort of customizable ASSP. SiliconBlue, for its part, makes Custom Mobile Devices (CMDs). Its mobileFPGA chips are “ready-to-use devices that incorporate custom functionality as well as standard building blocks that are standard to handset applications.” The entire chip is programmable, with Silicon Blue offering 50+ “mobileWARE customizable function blocks” to assist in custom designs. Basically there’s nothing custom about Custom Mobile Devices until you customize them yourself or have SiliconBlue do it for you.

If all of this sounds like a marketing pitch, frankly it is. But with impressive power and density figures, coupled with a lot of cell-phone oriented IP, the company is trying to take their chips where no FPGA has gone before. They push the flexibility, time-to-market, and BOM cost reduction arguments, which are all legitimate; the FPGA camp has been making them since Day One, but they’ve only gained traction as power consumption declined and custom ASICs became a game only the big dogs could play.

Still, LA family devices have some clearly targeted uses. SiliconBlue wants its CMDs to be companion chips to existing mobile chipsets, targeting video and imaging, sensor management, memory management, and port expansion. MobileWARE IP blocks support a wide range of protocols useful on handsets, including SLIMbus, DBI, ECI, MIPI-DBI/DPI, WUXGA, DDR 133, SDIO 3.0, and USB 2.0. Considering the increasingly wide range of sensors found in cell phones, CMDs could find full employment interfacing them with the applications processor.

High-speed, high-definition video is another promising area for low-power FPGAs, whose massively parallel structure makes them a natural for an application where DSPs are starting to run out of steam. For imaging the iCE40 features flexible, cascaded BRAM and extra PLLs to support high-speed LVDS signaling. iCE40 CMDs can stream video at 525 Mbps, enabling HD720p (1280 x 720) at 60 Hz and HD1080p (1920 x 1080) at 30 Hz.

Despite having a low profile in the U.S., SiliconBlue has some major design wins in Asia. Shankar claims the company has shipped 7 million of their 65-nm devices to over 250 customers, including tier one customers like Samsung and Huawei. Their chips are found in 30-40 products to date, including smartphones, cameras, personal media devices, and e-books.

The iCE40LP8K and iCE40HX8K, 8000 logic cell LP-Series and HX-Series devices are available now, with the smallest package starting at $1.99 in high volume. Remaining members of the Los Angeles family are expected to be in full production by Q4 2011.

–John Donovan

The PC market isn’t exactly stagnant, with over one million PCs shipping per day according to Otellini, adding to the over 1.4 billion PCs out there today. Gartner predicts the PC market will continue to grow at over 18% per year through 2011, though other analysts question whether this mature market can support the aggressive growth for Intel that Otellini has promised investors.

The answer is where the action is: in the explosive growth in Internet-connected devices—over 5 billion now, of which Otellini estimates probably half are so-called “smart devices,” a figure he predicts will grow to 5 billion by 2014. Intel wants a piece of this action, and how they plan to get there was at the heart of this morning’s keynotes.

The goal is to break out of the PC box and extend the Intel architecture (IA) into a wide range Internet-connected devices, offering “a full PC-compatible stack” to developers and a way to seamlessly transport and utilize music, video and data between different devices. Otellini refers to this as “port choice…The whole world is about apps” and users expect them to work the same way on PCs, netbooks, smartphones, tablets, etc. As Davi Perlmutter put it in his keynote, “Users want a seamless computing experience.” Intel’s acquisition of Wind River was a move in this direction.

Intel’s also focusing on wireless connectivity between devices. It acquired Infineon’s wireless group for its 3G and LTE technology, giving them a potential entry point into handsets, where ARM has a lock on processor sockets. They purchased TI’s cable modem operation to push into the Internet TV market—Intel’s partnership with Google to create Google TV being a case in point.

On the chip level Intel’s big play this IDF is its Sandy Bridge processor, which incorporates a graphics processor (GPU) on the same die as the CPU. Despite an extended demo of gaming graphics, it’s unlikely that any serious gamer is going to go out and buy a PC without a separate GPU. Otellini referred to Sandy Bridge as “revolutionary,” which it may be for Intel but not the rest of the world. Still, it’s a big step forward for Intel in terms of graphics processing speed, which Perlmutter said has increased 25x over that Intel chips could deliver as recently as 2006.

Now if Intel can come out with a low-power version of Sandy Bridge that’s suitable for a wide range of portable embedded devices, then they’d really have something. Expect to see a lot of action on that front.

Just as they have for the last several years, portable devices will continue to drive growth in the electronics industry. Far from just handsets, the mobile internet—also encompassing “the internet of things”—represents a huge expansion of the semiconductor application space to include a wide range of wireless home entertainment, automotive safety and autonomous industrial, military and medical devices. The mobile internet promises to be 10-100x larger in unit volume than the desktop internet ever was.

Amerasekera distinguishes between two types of portable electronics: performance “hub” devices such as computers, multi-media devices, wireless hubs and PDAs which have 1W to 5W needs today; and distributed, largely autonomous systems with micro and nano watt needs. A typical autonomous system—for example, wireless strain gauges in bridges and aircraft wings—has a life expectancy of up to 10 years. Assuming such a device is powered by today’s typical 100 mAh cell phone battery, the average power available from the battery is less than 1 µW. That isn’t possible with today’s technologies.

The problem is that battery technology has been scaling at about 2x every 10 years compared to semiconductor technology, which scales 2x every 18 months. The gap between what portable electronic devices demand and what batteries can deliver will continue to grow. Don’t expect much improvement from the battery camp any time soon. “The energy density of lithium-ion batteries is so high that they’re really like small hand grenades,” said Amerasekera. There isn’t much left on the atomic scale that has a higher energy density and isn’t radioactive.

How Do You Manage?

Lacking more capable batteries, silicon performance advances require power management. A lot of very effective techniques have been developed over the last several years. At 65 nm leakage power was reduced 300x vs. what it had been at 90 nm through a combination of SDRAM retention, logic power gating, channel length reduction, logic retention, process/temperature AVS and dynamic voltage and frequency scaling (DVFS). At 45 nm new techniques were devised—including adaptive body bias (ABB) and Retention ‘Til Access (RTA)—that resulted in 1000x reduction in active power. Still, Amerasekera—like Jan Rabaey in his keynote yesterday—is concerned that we’ve run out of tricks at the component level that will scale.

According to Amerasekera, future advances in ultra-low-power electronics will come at the system level. He gives the example of running an FFT in software, which requires 28 uW. Running it in hardware requires only 1.6 uW, an 18x improvement. Dropping the core voltage yields a further 1.8x power savings, for a total improvement of 28x. The SoC running the FFT now draws < 1uA.

3D chip techniques have finally evolved to the point where they can help optimize bandwidth, power and area. Currently 3D means package on package (POP) or stacked die. FinFET technology now enables more dense dies, and and die-to-die interconnects—vias connecting disparate digital, analog and RF layers—are becoming…viable.

Renewable energy—wind, solar, hydro and heating systems—has tremendous potential, though they’re all faced with economic as well as technical challenges. Energy harvesting also has a lot of potential, but efficiencies of such systems are quite low, as is the amount of energy they can deliver. Still, there’s a place for them going forward.

Divide and Conquer

Basically, the mobile internet will need a variety of energy sources:

• Batteries for general functionality
• Storage caps for high current functions
• Energy scavenging for extended battery life
• Wireless power sources for connection to the grid

The mobile internet will also require intelligent energy management and control, including

• Highly efficient on-chip power processing
• Control of energy sources and delivery
• Management of power demand and access
• Unreliable energy sources (aka wind, solar, etc.)

The challenge for the next decade will be coming up with another 2-3 orders of magnitude of power reduction to meet the demands of an increasingly wireless world.

Engineers always enjoy working on interesting problems, and this one should stay interesting for years to come.

Despite all of the hullabaloo about health care reform, I propose that the number one problem we’re facing right now is jobs—rather, the lack of them.

According to the U.S. Department of Labor, the unemployment rate in August was 9.7 percent, with 216,000 net jobs vanishing that month. That doesn’t count 9.1 million people “working part time for economic reasons” or 2.3 million people “marginally attached to the labor force.” When you factor in people who have just plain given up, the real unemployment rate is easily in the mid-teens.

No industry sector is unaffected, including high tech. According to the Semiconductor Industry Association (SIA), worldwide chip sales amounted to $51.7 billion, a 17-percent increase from the first quarter. SIA president George Scalise is encouraged “to believe that the sequential increase in quarterly sales represents a gradual recovery of demand.” Recovery, or dead-cat bounce? At this point it’s too early to tell.

In either case, this looks to be a jobless recovery, like the one we all went through after the Tech Crash of 2001-3. I managed to stay employed in Silicon Valley during those years and watched the new thinking that emerged during that recession. “If you lay off half your people and work the remaining half twice as hard, you wind up with the same output and much lower cost.” What MBAs call a no-brainer!

Semiconductor companies have also responded to the recession by cutting costs either by going fabless or by moving production offshore. Here in Austin AMD, Freescale and Applied Materials have cut roughly 2,000 manufacturing jobs in the past year. Cypress has closed Fab 4, Samsung is about to close Fab 1, AMD has closed a fab, and Samsung has announced it plans to lay off a third of its Austin work force. Applied Materials, among others, is shifting its production to Asia to be closer to its customers and to cut costs. Dell closed its last PC factory in Austin last year, for the same reasons. Even when the economy recovers, these manufacturing jobs aren’t coming back.

Austin’s response is the same as what I’ve seen in Silicon Valley—focus on being a design center and nurture an entrepreneurial infrastructure. The real value in any product—from chip to box—is the innovative design that goes into it. But how do you realize that value if you have a great idea but no employer to pay you to develop it?

Go into business for yourself.

Incubate to Innovate

Being talented at engineering doesn’t correlate directly—or even closely—with being talented at doing business. Even if you think you have a knack for business, you still need to complete your R&D, build a prototype, prepare a marketing plan and a business plan, put together a team and stay alive until you can find the money to fund all your plans.

That’s where technology incubators come into play. Incubators exist to provide technical and business management training; access to capital; professional and business networking opportunities; technology transfer assistance; and a host of other supporting activities to help minimize the risk for budding entrepreneurs trying get their ideas from concept to market.

The National Business Incubator Association (NBIA) defines a business incubator as “a comprehensive business assistance program that helps start-up and early-stage firms, with the goal of improving their chances to grow into healthy, sustainable companies.” Companies graduating from incubator programs have a far higher success rate than the average start-up. The U.S. Small Business Administration has found that after four years, only 44 percent of firms remain in business. Contrast that with what NBIA historically has found about incubator graduates: among incubation programs whose average age was nearly ten years, 87 percent of graduate firms were still in business.

Part of that success rate is due to screening, part to culling and part—the part that NBIA prefers to emphasize—is due to mentoring.

On the screening side, entry into most tech incubators is competitive. You have to explain your product and defend your proposed business plan—however preliminary it may be—to the incubator’s screening committee. This may be just the incubator manager, but more often it will consist of a group of experts familiar with your technology and your markets. This can be a real trial by fire, though it also forces you to think through important assumptions that you may not have really examined.

The TiE That Binds

I recently went to a local meeting of TiE—The Indus Entrepreneurs, the world’s largest entrepreneurial network—which served as a boot camp for would-be startups getting ready to pitch the intake committee at the Austin Technology Incubator (ATI). The grilling, while friendly, was relentless, especially on the marketing assumptions that the presenter had made. He left with a long check list of ideas that needed further research and reflection.

On the culling side, individuals or companies that make it into an incubator program are presented with a list of ‘graduation requirements’. If you’ve got enough customers that you look to be self-sustaining or you’ve grown to take up too much space in the incubator, it’s time for you to leave. Tech companies are typically given 2-3 years in an incubator before either being graduated or—if they seem to be chronically just spinning their wheels—forced out. The former companies usually succeed; the latter, rarely.

Mentoring and support is what incubators are all about. The incubator manager can connect you with a network of experts in marketing, business, accounting, law, IT—whatever support services you need to get off the ground. They also offer access to local networks of Angel investors and venture capitalists, to whom they can provide valuable introductions.

The incubator itself typically supplies all the services of an office suite arrangement, but at a much lower price. Non-profit incubators may offer below-market rent, for-profit ones probably market rate. Both provide packages of services, which may or may not be subsidized. There are no free lunches, but with all the support and services they provide, incubators are a real bargain.

Check It Out

So if you’re looking for a job—or are insecure in your current one—consider creating one for yourself. Check the NBIA web site, then look for an incubator near you. Go visit one and talk with the incubator manager. This may or may not be the road you should take, but it’s one you should consider. In either case you’ll come away from the meeting with a better idea of the direction you want to take.

You’ll also come away with a serious appreciation of the role of technology incubators, which I certainly share.

I must admit I’ve long associated reverse engineering with shady operators who’d rather knock off your chip than invest in the R&D to develop their own. While not denying that’s been known to happen, Julia proceeded to educate me to the legitimate uses of reverse engineering.

The full story is on on our site.