Operating in the 5 GHz band, 802.11ac chips will

• have 2-4x the bandwidth of 802.11n (80 and 160 MHz channels vs. 40 MHz for 11n);
• achieve a data throughput of up to 1 GBbit/s—~10x better than 11g and about 3x better than 11n for 2- and 3-stream implementations;
• support multi-user MIMO with up to 8 data streams (vs. 4 in 11n);
• support up to 256-QAM vs. 64-QAM in 11n;
• theoretically result in a considerably better power profile than 11n.

The “theoretically” hinges on the fact that the 802.11ac specification is yet to be ratified. The Initial Technical Specification Draft 0.1 was confirmed by IEEE 802.11 TGac on January 20, 2011. The specification isn’t expected to be finalized until mid-year at the earliest, at which point the Wi-Fi Alliance expects to ratify it, though IEEE ratification will take longer.

Are We There Yet?

That hasn’t stopped a rush to market with ‘pre-ac’ silicon, exactly the same thing that happened before the 802.11n specification was ratified. Last time the first out of the chute was Broadcom, whose ‘pre-n’ 802.11 chips hit the market well before the warring camps in the IEEE working group had ironed out their differences.

At CES earlier this month Broadcom announced that it is sampling 802.11ac silicon—the BCM43xx family, which it refers to as ’5G WiFi’—though it is yet to announce a date for full production. Early adopters of Broadcom’s 11n chips took a big chance but came out unscathed. Will they be as lucky this time? According to Michael Hurlston, Broadcom’s senior vice president of Broadcom’s Home and Wireless Networking business unit, ”I’m confident that any changes to the spec beyond this point and before final ratification will be window dressing, and relatively small.” History, hype, or hope? Only time will tell. Still, having pulled it off before—and pushing a lot of chips, as it were, onto the table—it would be foolish to bet against Broadcom.

Also joining the ‘pre-ac’ race is Redpine Networks, currently sampling its Quali-Fi™ 802.11ac chip. The Quali-Fi product is accompanied by Redpine’s software framework that includes an access point, Wi-Fi certified client and Redpine’s Wi-Fi Direct™ functionality. Redpine CEO Venkat Matella tells Low-Power Design that modules with 801.11ac chipsets will be available late this year or early 2013.

I’d be very surprised if Qualcomm/Atheros and Samsung—who co-chair the IEEE 11ac Task Group—as well as committee members Cisco, Intel, LG, Marvell, Mediatek, and others—didn’t announce 11ac chips shortly after the specification is ratified—if not before.

With even once power-hungry Wi-Fi now joining the low-power race, low-power wireless is no longer just a trend, it’s mainstream. We may not be ‘there yet’—and never will be, since the goal is one you can only approach asymptotically—but silicon vendors are making an impressive amount of incremental progress. Stay tuned for more exciting developments.

 By the end of 2012, all private land mobile radio users operating below 512 MHz must move to 12.5 kHz narrowband voice channels and highly efficient data channel operations.  If they don’t, they will be in violation of their license and subject to fine by the FCC. In addition, the FCC will not be allowing any new licenses for systems operating with 25 kHz wide channels, or expansion of existing systems, after January 1, 2011. That means after December 31, 2010 operators will need to make decisions regarding how they intend to comply by the end of 2012.

 The purpose of the FCC’s 2003 edict was to clear up congestion in the HF/VHF bands, which this action would clearly do. However the public-safety agencies who have the most to gain from this change now find themselves strapped for the cash to implement it; in the absence of government funding for new equipment it’s essentially become another unfunded mandate. The FCC is hanging tough that it will indeed fine or shut down your local police communications center if they don’t comply, but I find it impossible not to share Bischoff’s view that that there’s no way that’s going to happen. It’s either a Mexican standoff or time to negotiate.

 All new equipment mandated by the DHS must comply with Project 25 (P25) standards set by the Association of Public-Safety Communications Officials ( APCO-25) and other agencies. This standard was developed to insure that first responders nationwide can all communicate with each other when they show up at a disaster site. Current APCO-25 Phase 1 radio systems operate in 12.5 kHz analog, digital or mixed mode using continuous 4-level FM (C4FM) modulation for digital transmissions at 4800 baud and 2 bits per symbol, yielding 9600 bits per second total channel throughput. Receivers designed for the C4FM standard can also demodulate the compatible quadrature phase shift keying (CQPSK) signals. As Bischoff points out, any equipment purchased before 2000 will have to be replaced in order to be interoperable with newer equipment. That represents a real hardship for smaller, rural police and fire departments in particular.

 The solution seems to me to be two-fold: (1) petition the FCC for an extension on compliance; and (2) push the administration to fund the purchase of new equipment, flying the flag of “homeland security”. In this economic environment more money is pretty unlikely, so getting the FCC to back off is the main hope.

 If this burr gets under your saddle you can contact the FCC or the P-25 Technology Interest Group (PTIG).  Or check out the IWCE conference and exhibition to be held in Las Vegas from March 8-12, 2010. In any case thanks to Jay (KA5OST) for bringing the issue to my attention and to Glen Bischoff for keeping it on the front burner.

Digital and analog designs start with some basic differences. Digital designs tend to focus on the time domain, whereas analog designs are more concerned with the frequency domain. Digital designers worry about time delays; analog designers worry about the accuracy of their components, which they can’t change by editing a few lines of code. For RF designers there are no simple components; every resistor has stray capacitance and inductance, and every trace is an antenna. Parasitic extraction hits a whole new level of complexity in RF designs. RF integration is the single biggest challenge for SoC designers and a major headache at the board level, too.

Designing the RF front end for a cell phone involves some serious tradeoffs. The power amplifier (PA) is second only to the display as an energy hog in handsets. Modern handset receivers typically have a sensitivity in the range of -106 dBm; they also need to be able reject a 60 dB out-of-band signal without flattening the front end. The obvious solution is to crank up the power to the front end, since bandwidth and power are directly related—a tough tradeoff in a portable device.

In handsets you’ll also need to provide multiple RF chains that operate on different frequency bands for cellular, Bluetooth, Wi-Fi, UMTS, Mobile WiMAX, GPS and more. Oh, and you want DTV, DAB and FM with that, too? Just finding room on a tiny PC board for a combination of these protocols, each with different antennas operating at different frequencies—or MIMO antennas with multiple data streams—is problematic enough. Keeping them from interacting or radiating spurious signals back into the analog sections of the board is a serious headache. Integrating RF components on silicon along side analog mixers, filters and LNAs is trickier still.

One way to ease the pain of RF integration is to go digital as quickly as possible. So called “digital RF” doesn’t really replace a UHF sine wave with a string of bits, but it comes close. On the receive side, direct-conversion receivers combine direct RF sampling with discrete-time signal processing. The RF signal is sampled at the Nyquist rate, converted into packets, filtered, down-converted and fed to the baseband processor. The transmit PA, in one configuration, is a series of digital NMOS switches that feed a matching network. On-chip capacitors smooth the square waves into an RF sine wave that is then fed to the antenna. This approach can cut PA power consumption in half.

The tools to enable designers to simulate and verify an RF/mixed-signal design have only recently started to appear. Traditionally analog designers have used SPICE models while their digital colleagues used VHDL or Verilog; rationalizing the results was at best time consuming. Now we’re starting to see SystemC models that include concurrency, bit accuracy, timing and hierarchy, enabling designers working at the architectural level to do hardware/software co-design, synthesizing and verifying a design down to the silicon. We’re still not to the point where you can go smoothly from algorithmic exploration to net lists, but we’re getting there.

Someday soon analog and RF will no longer be the exclusive turf of grumpy greybeards in corner cubes. They’ll be just two more tools in every designer’s toolkit.
###
This blog post was originally carried on Cadence’s Community Blogs site earlier this month.