I must admit I’ve long associated reverse engineering with shady operators who’d rather knock off your chip than invest in the R&D to develop their own. While not denying that’s been known to happen, Julia proceeded to educate me to the legitimate uses of reverse engineering.

The full story is on on our site.

This evening Gary kicked off the 46th DAC with a pretty upbeat assessment, considering the the state of the economy. Long a believer in ESL–the need for it, if not the available tools–he sees RTL handover costing EDA vendors a lot of seats. However, as FPGAs continue to grow in popularity, EDA sales into that market will also grow.

ESL tools–promising and now starting to deliver smooth design flows from TLM to RTL to gate-level analysis–could make up for many if not most of those seats lost for traditional CAD tools. I’m not convinced the numbers add up, but the analysis makes sense.

The other thing vendors need to do, according to Smith, is to stop undercutting each other on price. At $350K per seat, it doesn’t take too many sales to sustain a healthy multi-billion dollar market. Growth won’t be explosive but it should continue to be healthy.

Referring again to the FPGA market, Gary wondered with all the consolidation that’s taken place of late in the EDA industry if it won’t wind up looking like the FPGA market, where lack of competition keeps prices and margins at a high level. Maybe the solution is one big happy oligopoly where everyone gets over this insane race to the bottom on price.

On that happy thought everyone checked their glasses (half full or half empty?) and looked around for the next friend. Gary will present detailed market prognostifications tomorrow morning at DAC’s formal launch.