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Design Articles

Verification Methodology for Low Power

By Srikanth Jadcherla, Synopsys, Inc.; Janick Bergeron, Synopsys, Inc.; Yoshio Inoue, Renasas Technology Corp.; and David Flynn, ARM Limited

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During the month of March, 2010 Low-Power Design is serializing Chapters 5 and 6 of the Verification Methodology Manual for Low Power by Jadcherla, et al (Synopsys, Inc.: Mountain View, CA). Copyright (c) 2009 by Synopsys, Inc., ARM Limited, and Renasas Technology Corp. This four-part series includes:

Part 1: Multi-Voltage Testbench Architecture—Testbench Structure and Components

In this chapter, the formation or migration to a multi-voltage testbench is discussed. The various testbench components are also identified and discussed. This will cover coding guidelines, power intent and library modeling aspects as well. Overall preparation for the verification process is the focus of this chapter.



Part 2: Multi-Voltage Testbench Architecture—Coding Guidelines and Library Modeling for Low Power

As can be expected, the impact of power management can be felt on how code is written as well, both for the DUT and testbench. This section contains coding issues and guidelines for low power designs. These are usually encountered when migrating either existing code or coding rules to low-power designs. They involve both testbench and DUT code.



Part 3: Multivoltage Verification—Static Verification

This chapter takes a detailed look at both static and dynamic verification. We cover static verification first as part of the flow and move onto dynamic verification. The flow at various design stages is also discussed.



Part 4: Multivoltage Verification—Dynamic Verification and Hierarchical Power Management

The first objective of dynamic verification is to exercise the power state table. Assuming that static verification yields a clean result, we can assume that in a steady multi-voltage state, there are no further obvious electrically hazardous conditions. Corner cases may well exist that need to be uncovered by dynamic verification. However, before we get there we have some basic functionality to verify.




Synopsys customers can download a free copy of the book at www.synopsys.com/vmmlp. The companion Low-Power Methodology Manual is similarly available at www.synopsys.com/lpmm.

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