Xilinx Accelerates Broadcast Industry Adoption of Video over IP at IBC 2011

Showcases 10 Gbps Technology for Transporting High-Quality Video Over Internet Protocol

AMSTERDAM, Sept. 8, 2011 - Today, at the IBC 2011 Conference (Hall 10, Stand #10.D25), Xilinx, Inc. announced the availability of its SMPTE 2022-5/-6 intellectual property core, the company's newest building block for broadcast equipment developers delivering the internet protocol (IP) -based systems needed to cut the high cost of transporting raw, high-bit video from remote events, to studios, to post editing houses, and other points along the production process. The core brings Forward Error Correction (FEC) for video over IP to Xilinx's Broadcast Real-Time Video Engine Targeted Design Platform so developers can quickly build flexible, high-bandwidth systems capable of recovering IP packets lost to network transmission errors and ensure the picture-perfect quality of uncompressed, full bandwidth professional video.

"The ability of Field Programmable Gate Arrays (FPGAs) to bridge broadcast and communications domains -- and perform real-time video processing in a highly integrated fashion -- ultimately leads to dramatically reduced capital expenditures and operating expenses for the broadcast industry," said Robert Green, Senior Manager, Broadcast Business at Xilinx. "Now that video can be reliably delivered over 10 Gbps Ethernet (10 GbE), the convergence of broadcast and telecommunications will, for example, lead to far fewer broadcast trucks and eliminate miles of cable at events such as NASCAR and World Cup Football."

The SMPTE 2022-5/-6 video networking standard defines a transport protocol for the carriage of real-time, non-piecewise constant, variable bit rate (VBR) MPEG-2 Transport Streams over IP networks. The capability to robustly support multiple, uncompressed High-Definition (HD) and 3D high-resolution video streams encapsulated in SMPTE 2022-5/-6 Ethernet IP packet format is critical to the deployment of a new generation of broadcast equipment that will eventually replace many of the portable infrastructures that support outside live broadcast and remote production. With today's announcement, Xilinx brings FEC functionality to its SMPTE 2022-6 intellectual property core first announced at NAB 2011, to enable the recovery of video data lost to network transmission errors.

 "SMPTE 2022 and the Xilinx 10 Gbps video over IP technology will make equipment available to me so I can focus on doing my job and not worry about delays between production steps to physically transport video tapes or HDD from place to place," said Matthew Miller, freelance video editor and head of Mad Capper Studios whose production credits include "Project Runway," "Ancient Aliens," "America's Next Top Model," and many others. "In a nut shell, the technology removes extra steps in the editing process so I can edit on the fly, leaving me more time to focus on high-production value content."

Having the ability to remove delays in getting content to the production team through dailies or for offline editing and color grading, as well as using high-performance, compute-intensive  platforms based on Xilinx(r) FPGAs for real-time video processing, compression and modulation, means that high quality content can be captured, processed and delivered faster than ever before.

Broadcast Real-Time Video Engine Supports Narrow Market Windows

The inherent flexibility of FPGAs as compared with Applications Specific Integrated Circuits (ASICs) and Application Specific Standard Products (ASSPs) means that equipment can quickly be adapted to changing standards and have longer life in the field after installation. FPGAs also reduce cost for SMPTE 2022-5/-6 systems through single-chip integration of other real-time video, audio and data processing functions, allowing for the quick adoption and deployment of 10 GbE video over IP for city-to-city or stadium-to-studio wide area networks (WANs).

Deployable today for designs targeting the Virtex(r)-6 FPGA family, system integration, lower bill of materials and system bandwidth can be further enhanced with the new 28nm Kintex-7 FPGAs, which are available with up to 32 high-speed GTX transceivers capable of supporting 12.5 Gbps line rates for an increase of 2x the system bandwidth.

 "Time-to-market is very critical for our competitive position in the industry," said Andrew Osmond, Vice President of Engineering, Nevion USA. "By using Xilinx FPGAs in conjunction with the Broadcast Real-Time Video Engine Design Platform we are able to push our VideoIPath video services solutions into 10 GbE and beyond with the highest quality product and the lowest latency for live video transmission and production."

The Broadcast Real-Time Video Engine incorporates Xilinx video and image processing intellectual property cores that can be integrated using the Virtex-6 and Spartan(r)-6 FPGA Broadcast Connectivity Kits. The kits' FPGA mezzanine card (FMC) connectors allow designers to quickly evaluate and integrate many different video interfaces such as SD/HD/3G-SDI, AES3 audio, DVI, HDMI, DisplayPort, 10 GbE for SMPTE 2022-5/-6 video over IP and other interfaces into broadcast applications needing real-time video performance, such as breaking news, live events and sports coverage. Applications needing the highest video quality and highest bandwidth in digital cinema and Super Hi-Vision (or Ultra HDTV) systems can also be built.

Xilinx at IBC

Xilinx is demonstrating several key components of its Broadcast Real-Time Video Engine Targeted Design Platform at IBC, Hall 10, Stand #10.D25 including:

*         Implement and Adapt to Emerging Network Technologies

Xilinx will demonstrate the SMPTE 2022-5/-6 intellectual property core, which enables the adoption of lower cost Ethernet networks for transporting uncompressed video, support for up to 6x HD-SDI or 3x 3G-SDI video interfaces with excellent jitter performance.

*         Remove External Voltage-Controlled Crystal Oscillators (VCXOs) for
SDI Reference Clocks
Debuting at IBC, attendees can see a demonstration of how customers can remove  VCXO components from their multichannel SDI designs through FPGA integration, resulting in a  significant bill of materials reduction (up to $20 per video output channel).

*         Lowering Power and Heat in Broadcast Applications with 7 Series FPGAs
By demonstrating SDI support on the Kintex-7 FPGA, Xilinx shows how cost and power can be reduced by up to 50 percent without sacrificing performance compared to previous generation FPGAs. The industry's first 28nm FPGA enables smooth migration of designs from previous generation Virtex-6 FPGAs and across 7 series FPGAs.

*         IP Cores for Real-Time 1080p60 & 4K Video Processing
Xilinx's Real-Time Video Engine Targeted Design Platform running on Virtex-6 FPGAs and Spartan-6 FPGAs illustrates the use of the Targeted Design Platforms for prototyping and implementing video processing chains in broadcast equipment.

*         Reduce Video Bandwidth and Storage Requirements Without Sacrificing Video Quality
Xilinx Alliance Member Vanguard Software Solutions will also exhibit their H.264/AVC-I & AVC-Ultra Video Codec core, which will show broadcast equipment manufacturers how to quickly and easily integrate AVC-I Class50 & Class100 and AVC-Ultra (up to 300 Mbps) into their broadcast systems, which ultimately leads to lower cost of using hard-disk drives over tape by enabling smaller file sizes which further drives the need for SMPTE 2022-5/-6.

Availability

The Xilinx SMPTE 2022-5/-6 intellectual property core is available today through early access. Customers can contact their local Xilinx sales representative for more information. The core will be available as a Xilinx LogiCORE IP core on Xilinx.com in Q1 2012. For more information about Xilinx in broadcast, please visit:
http://www.xilinx.com/broadcast.