Cadence Announces System Development Suite

SAN JOSE, CA--(Marketwire - May 3, 2011) - Cadence Design Systems, Inc. today announced a breakthrough in electronic design with a new suite of products that promises to cut system integration time by up to half for next-generation designs. Bringing hardware and software development closer together than ever before, the suite features four connected platforms that enable hardware-software co-design from architectural-level development through to prototyping. While some companies focus on a portion of the development cycle, no one company has offered the full suite of hardware-software development platforms until now.

"The acceleration of design complexity is even faster than we predicted a year ago, when we first discussed the disruptive transformation happening in system design," said John Bruggeman, senior vice president and CMO, Cadence. "Product development cycles are shrinking to as little as six months, putting undue pressure on design teams who must work 24/7 to deliver competitive systems -- and even then there is a high risk that their designs won't see the light of day. Our suite provides a level of connection between hardware and software that hasn't existed until now and will not only enable the most efficient design methods possible, but will redefine the system design process moving forward."

Four Essential Platforms for System Development
The Cadence System Development Suite features two new products -- the Cadence Rapid Prototyping Platform and the Cadence Virtual System Platform -- and connects them to the market-leading Cadence Palladium XP Verification Computing Platform and Cadence Incisive Verification Platform. The suite uniquely implements an integrated flow with a common environment that enables system engineers to migrate quickly from one development phase to another.

"The Cadence System Development Suite is an industry first, providing a development continuum that enables engineers to have a seamless migration path through the design phases," said Nimish Modi, senior vice president for the System and Software Realization Group at Cadence. "This integrated flow embodies the open, connected and scalable tenets of our approach to System Realization and provides a significant breakthrough in addressing the challenges of early software development and hardware/software convergence, leading to a dramatic reduction in development schedules."

Smooth Migration from Emulation to FPGA-based Prototyping
The Cadence Rapid Prototyping Platform includes off-the-shelf FPGA boards with capacities of up to 30 million ASIC gates, supports standard ASIC flows and provides fast design mapping, multi-FPGA automatic partitioning and industry leading FPGA place & route tools. Its unified environment with the Cadence Verification Computing Platform enables the fast and smooth migration of designs from emulation to FPGA-based prototyping. It delivers high-performance and affordable replicates for early software development and for running exhaustive regression tests while leveraging and sharing the fast bring-up times, superior debug capabilities and comprehensive SpeedBridge adapters' portfolio of the Cadence Verification Computing Platform.

Multiple Views of Hardware, Software, Memories and Registers
The Cadence Virtual System Platform is a software development platform built on top of abstracted hardware models, approaching real-time speeds. It delivers an integrated and fully synchronized multi-core hardware software debug environment, with multiple views of hardware, software, memories and registers enabling system analysis and tight handshake between hardware and software teams. Combined with the Cadence Incisive Verification Platform, it delivers mixed TLM/RTL unified simulation and common metric-driven verification methodology, reducing the risk of discrepancies between the abstracted hardware model and the eventual RTL. Finally, it accelerates the process of platform creation through automation by enabling customers to quickly build highly configurable transaction-level non-processors hardware models and utilize high-performance processor models delivered by ARM and other third parties.

Introduced today at industry events in Silicon Valley and Munich, Germany, the Cadence System Development Suite is a great leap forward in Cadence System Realization technology, delivering against the EDA360 vision, which cites the need for greater technology integration -- bridging silicon, SoC and system -- to maximize profits.

"We have used Cadence emulation products for many years, including the Cadence Verification Computing Platform, for system validation on our most important projects, such as NVIDIA Tegra processors," said Narendra Konda, director of engineering at NVIDIA. "But with increased software content and multi-core designs, today's electronics systems have become substantially more complex and require a more robust set of technologies to meet time to market and ensure quality. Accordingly, we have deployed the broader Cadence System Development Suite, with elements such as the Cadence Rapid Prototyping Platform offering immediate incremental value."

"In order to streamline the system development process of ARM-based designs, we have collaborated with Cadence extensively over the last 10 years. The new Cadence approach of delivering a single environment for virtual prototyping, emulation and FPGA-based prototyping is clearly a need for future complex designs," said Joe Convey, director of Design Enablement at ARM. "Continuing our collaboration to link the Cadence System Development Suite with ARM IP will enable our mutual customers with a pathway to product success."

The Cadence System Development Suite includes the award-winning Cadence Palladium XP Verification Computing Platform, Cadence Incisive Verification Platform and Cadence Rapid Prototyping Platform, which are immediately available; and the Cadence Virtual System Platform, currently in use with early adopters and widely available later this year.